急招ASIC Implementation Engineer----南京

fq132

Job  Description:

-  Block, IP macro or SoC level implementation in advanced process

-  UPF Synthesis with Synopsys DC/DCT/G flows or CPF synthesis with Genus flow

-  Full Chip formal check on RTL2Gate and Gate2Gate with LEC and/or formality  tools.

-  Full Chip CLP check with CPF for nonPG and PG netlists for low power signoff.

-  Working with BE team to timing closure with PT or Tempus tools

- Ability to build or perfect the  EDA-methodology-flow with perl, tcl or shell  

-  Knowledge on FE design will be an added advantage

-Knowledge  on DFT (mbist/scan) will be an added advantage



Qualifications:

-  BSEE degree or above

-  Strong understanding of synthesis flow using DC/DCT/DCG - for a low power (UPF)  and

    high speed- complex SoC

-  Hands on experience with formal verification tools such as LEC and/or formality

-  Must have the CTS conceptions in ICC&Innovas at P&R stage
  - Strong STA skills. Must have thorough knowledge on closing timing at unit and  top level

-  Experience in mbist and scan will be plus

-  Proficient in Perl, Tcl and Shell programming

-Good team work spirit


也欢迎应届生哈，公司的培训流程比较完善，平台比较好，欢迎咨询 V dsn88990011

fq132

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TKdeath

哪家

fq132

   

TKdeath 发表于 2022-3-4 01:41
哪家

南站附近ASR

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