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[招聘] Qualcomm上海招聘PR Engineer

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发表于 2019-3-1 16:41:31 | 显示全部楼层 |阅读模式

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Job Description:
Education:
Bachelor and Master degrees; Master is preferred
Experience:
Experienced fundamental physical design process, from gate-level netlist to timing/routing/verification clean gds, at least once
Went through tape-out project(s) in and below 40nm or under processes
Minimum of 3 year of hands-on physical design experience
Requirements:
Be familiar to physical design flow, from gate-level netlist to gds
Master mainstream EDA PR(Innovus,ICC,ICC2…) , Timing closure tool (PTSI,Tweaker) and PV tools (Calibre) from SNPS, CDNS or MENTOR
Be able to solve either timing or routing problems
Be Familiar to do RC extraction and
Have basic knowledge on SI conceptual scope, as is preferred
Have ability to do library and design data sanity check, as is preferred
Description of Function & Responsibility
: Duties include STA , floorplan exploration, implementation, metal spin and physical verification.
 楼主| 发表于 2019-3-1 22:20:07 | 显示全部楼层
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 楼主| 发表于 2019-3-4 10:52:11 | 显示全部楼层
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