带隙运放输出到vdd的电容、电阻是什么作用？

istart_2002 · 发表于 2017-3-20 21:30:33

本帖最后由 istart_2002 于 2017-3-21 15:55 编辑

带隙运放输出到vdd的电容、电阻是什么作用？
微信截图_20170320171110.jpg

AcoAco · 发表于 2017-3-20 22:30:54

本帖最后由 AcoAco 于 2017-3-20 22:36 编辑

It is possible to add zero poles at the output of the op amp .....
Turn the high-frequency op amp output noise to VDD. While leaving the low frequency (DC) alone.
Is your Op-Amp a single level?
The picture is not clear. The picture has no resolution to read the name of the node.
Where is the BG output (picture chopping)?

istart_2002 · 发表于 2017-3-21 16:00:04

It is possible to add zero poles at the output of the op amp .....
Turn the high-frequency op amp o ...
AcoAco 发表于 2017-3-20 22:30

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1.op is folded cascode(one stage).
2.output node is O.

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