NXP(北京)内部推荐(验证职位)

王府井

JD
  o    2-5 years’ experience of digital verification with Master degree  
  o    Proven track record for successful verification of IC products in the past, at least one successful tape-out experience.  
  o    Good background in Verilog/SystemVerilog and verification methodology, UVM/VMM is required.   
  o    Knowledge of C is a plus.  
  o    Be familiar with ARM CPU based SOC design architecture.  
  o    Knowledge of block, sub system and system level verification concepts.  
  o    Knowledge and experience with Perl or python and Unix/Linux scripting is desired.  
  
  
有意可发简历158090058@qq.com