Cadence 上海 招聘应届硕士毕业生 Sr PV Design Engineer

艾清别诺

Job description:

1 . run place& route flow regression weekly

2. Analyze flow issues, such as STA issues, DRC issues orpower issues, during placement,cts routing and optimization.

3.Design real chipswith advance nodes with signoff quality.

Position requirements:

1 .good at STA. Know about place,routing,cts,optimizationand SI analysis is a plus.

2. Good at unix scripts, cshell . perl is a plus.

3. strong ability in analyze and solving issues, goodEnglish skill , good team work ability.

感兴趣的可以发简历到xiulingl@cadence.com